Fix V3 bootloop: DIO flash mode, auto-verify, boot monitoring

- V3 board profile defaults to DIO flash mode (QIO fails on some flash chips)
- flash.py: auto-verify on --erase/--full, post-flash boot monitoring with
  auto-DIO retry on bootloop detection
- flash.py: erase keeps device in download mode (--after no_reset) to prevent
  race condition on re-entry
- flash.py: remove --dio/--verify flags (now automatic), hidden --flash-mode
  for power users
- RNode_Firmware.ino: release BT memory (~70KB) on V3 boundary where BT is
  compile-time disabled
- RNode_Firmware.ino: add WDT resets throughout setup() to prevent timeout
  during long init sequences
- RNode_Firmware.ino: fix while-not-Serial blocking on V3 (no USB-CDC)
- RNode_Firmware.ino: init bt_devname from WiFi MAC when BT disabled
- RNode_Firmware.ino: bootloop detection via RTC_NOINIT_ATTR -- forces config
  portal after 5 rapid reboots

platformio.ini

@@ -314,7 +314,10 @@ platform = espressif32
 board = heltec_wifi_lora_32_V3
 custom_variant = heltec32v3
 board_build.filesystem = littlefs
-; Flash / memory layout for 8MB flash + 8MB PSRAM (QSPI)
+; Flash / memory layout for 8MB flash
+; PSRAM: V3 ESP32-S3FN8 has NO PSRAM — firmware detects this at runtime
+; and falls back to internal SRAM for TLSF pool.
+; BOARD_HAS_PSRAM tells Arduino to *attempt* psramInit(); harmless if absent.
 board_upload.flash_size = 8MB
 board_upload.maximum_size = 8388608
 board_build.partitions = default_8MB.csv