Initial commit: RNodeTHV4 boundary mode firmware for Heltec V4
Bridges LoRa mesh and TCP/WiFi backbone networks using microReticulum. Based on microReticulum_Firmware with boundary mode additions: - BoundaryMode.h: State management and EEPROM persistence - BoundaryConfig.h: WiFi captive portal for configuration - TcpInterface.h: TCP backbone interface with HDLC framing - Display.h: Custom OLED layout with network status indicators - Transport/Identity library patches for embedded memory constraints
This commit is contained in:
146
sx128x.h
Executable file
146
sx128x.h
Executable file
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// Copyright Sandeep Mistry, Mark Qvist and Jacob Eva.
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// Licensed under the MIT license.
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#ifndef SX128X_H
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#define SX128X_H
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#include <Arduino.h>
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#include <SPI.h>
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#include "Modem.h"
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#define LORA_DEFAULT_SS_PIN 10
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#define LORA_DEFAULT_RESET_PIN 9
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#define LORA_DEFAULT_DIO0_PIN 2
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#define LORA_DEFAULT_RXEN_PIN -1
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#define LORA_DEFAULT_TXEN_PIN -1
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#define LORA_DEFAULT_BUSY_PIN -1
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#define LORA_MODEM_TIMEOUT_MS 15E3
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#define PA_OUTPUT_RFO_PIN 0
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#define PA_OUTPUT_PA_BOOST_PIN 1
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#define RSSI_OFFSET 157
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class sx128x : public Stream {
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public:
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sx128x();
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int begin(unsigned long frequency);
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void end();
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void reset();
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int beginPacket(int implicitHeader = false);
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int endPacket();
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int parsePacket(int size = 0);
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int packetRssi();
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int packetRssi(uint8_t pkt_snr_raw);
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int currentRssi();
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uint8_t packetRssiRaw();
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uint8_t currentRssiRaw();
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uint8_t packetSnrRaw();
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float packetSnr();
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long packetFrequencyError();
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// from Print
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virtual size_t write(uint8_t byte);
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virtual size_t write(const uint8_t *buffer, size_t size);
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// from Stream
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virtual int available();
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virtual int read();
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virtual int peek();
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virtual void flush();
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void onReceive(void(*callback)(int));
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void receive(int size = 0);
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void standby();
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void sleep();
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bool preInit();
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uint8_t getTxPower();
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void setTxPower(int level, int outputPin = PA_OUTPUT_PA_BOOST_PIN);
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uint32_t getFrequency();
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void setFrequency(uint32_t frequency);
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void setSpreadingFactor(int sf);
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uint8_t getSpreadingFactor();
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uint32_t getSignalBandwidth();
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void setSignalBandwidth(uint32_t sbw);
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void setCodingRate4(int denominator);
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uint8_t getCodingRate4();
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void setPreambleLength(long preamble_symbols);
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void setSyncWord(int sw);
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bool dcd();
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void clearIRQStatus();
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void enableCrc();
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void disableCrc();
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void enableTCXO();
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void disableTCXO();
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void txAntEnable();
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void rxAntEnable();
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void loraMode();
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void waitOnBusy();
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void executeOpcode(uint8_t opcode, uint8_t *buffer, uint8_t size);
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void executeOpcodeRead(uint8_t opcode, uint8_t *buffer, uint8_t size);
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void writeBuffer(const uint8_t* buffer, size_t size);
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void readBuffer(uint8_t* buffer, size_t size);
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void setPacketParams(uint32_t target_preamble_symbols, uint8_t headermode, uint8_t payload_length, uint8_t crc);
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void setModulationParams(uint8_t sf, uint8_t bw, uint8_t cr);
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void crc() { enableCrc(); }
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void noCrc() { disableCrc(); }
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void setPins(int ss = LORA_DEFAULT_SS_PIN, int reset = LORA_DEFAULT_RESET_PIN, int dio0 = LORA_DEFAULT_DIO0_PIN, int busy = LORA_DEFAULT_BUSY_PIN, int rxen = LORA_DEFAULT_RXEN_PIN, int txen = LORA_DEFAULT_TXEN_PIN);
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void setSPIFrequency(uint32_t frequency);
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void dumpRegisters(Stream& out);
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private:
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void explicitHeaderMode();
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void implicitHeaderMode();
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bool getPacketValidity();
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void handleDio0Rise();
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uint8_t readRegister(uint16_t address);
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void writeRegister(uint16_t address, uint8_t value);
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uint8_t singleTransfer(uint8_t opcode, uint16_t address, uint8_t value);
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static void onDio0Rise();
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void handleLowDataRate();
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void optimizeModemSensitivity();
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private:
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SPISettings _spiSettings;
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int _ss;
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int _reset;
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int _dio0;
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int _rxen;
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int _txen;
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int _busy;
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int _modem;
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unsigned long _frequency;
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int _txp;
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uint8_t _sf;
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uint8_t _bw;
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uint8_t _cr;
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int _packetIndex;
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uint32_t _preambleLength;
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int _implicitHeaderMode;
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int _payloadLength;
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int _crcMode;
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int _fifo_tx_addr_ptr;
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int _fifo_rx_addr_ptr;
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uint8_t _packet[256];
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bool _preinit_done;
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bool _tcxo;
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bool _radio_online;
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int _rxPacketLength;
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uint32_t _bitrate;
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void (*_receive_callback)(int);
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};
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extern sx128x sx128x_modem;
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#endif
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